Author: digitalmedium1

https://cppcon.org/
https://github.com/CppCon/CppCon2020
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FPGA (Field-Programmable Gate Arrays) are electronic devices which are programmable with a configuration memory to implement arbitrary electronic circuits. While they have been used for decades to implement various adaptable electronic components, they got some traction more recently to be used as generic programmable accelerators more suitable for software programmers.

There are already HLS (High-Level Synthesis) tools to translate some functions written with languages like C/C++ into equivalent electronic circuits which can be called from programs running on processors to accelerate parts of a global application, often in an energy-efficient way. The current limitation is that there are 2 different programs: the host part, running the main application, and the device part, glued together with an interface library without any type-safety guaranty.

Since the C++ standard does not address yet the concept of hardware heterogeneity and remote memory, the Khronos Group organization has developed SYCL, an open standard defining an executable DSL (Domain-Specific Language) using pure modern C++ without any extension. There are around 10 different SYCL implementations targeting various devices allowing a single-source C++ application to run on CPU and controlling various accelerators (CPU, GPU, DSP, AI...) in a unified way by using different backends at the same time in a single type-safe C++ program.

We present a SYCL implementation https://github.com/triSYCL/sycl targeting Xilinx Alveo FPGA cards by merging 2 different open-source implementations, Intel’s oneAPI DPC++ with some LLVM passes from triSYCL.

For a C++ audience, this presentation gives a concrete example on why the C++ standard does not describe detailed execution semantics (stack, cache, registers...): because C++ can be executed on devices which are not even processors.

While this presentation targets FPGA and a SYCL implementation from a specific vendor, the content provides also:
- a generic introduction to FPGA which should be interesting outside of Xilinx or even without the use of SYCL;
- how C++ can be translated in some equivalent electronic circuits;
- a generic introduction to SYCL which should be interesting for people interested to know more about heterogeneous programming and C++, beyond only FPGA.

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Ronan Keryell

Ronan Keryell is principal software engineer at Xilinx Research Labs, where he works on high-level programming models for heterogeneous systems, such as FPGA and CGRA, with the open-source https://github.com/triSYCL/triSYCL SYCL implementation.

He is the specification editor of the SYCL standard, member of the SYCL, SPIR & OpenCL standard committees from Khronos Group & ISO C++ committee.

Ronan Keryell received his MSc in Electrical Engineering and PhD in Computer Science in 1992 from École Normale Supérieure of Paris & University of Paris Sud (France), on the design of a massively parallel RISC-based VLIW-SIMD graphics computer (a Jurassic GPU ancestor...) and its programming environment. He spent some time in the academia teaching and working on automatic parallelization, compilation of PGAS languages (High-Performance Fortran), high-level synthesis and co-design, networking and secure computing. He was co-founder of 3 start-ups, mainly in the area of High-Performance Computing, and was the technical lead of the Par4All automatic parallelizer at SILKAN, targeting OpenMP, CUDA & OpenCL from sequential C & Fortran. Before joining Xilinx, he worked at AMD on programming models for GPU.

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Videos Filmed & Edited by Bash Films: http://www.BashFilms.com

YouTube Channel Managed by Digital Medium Ltd https://events.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains: http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---
It is common practice to use defensive runtime checks, such as C-style assertions to help ensure program correctness, especially during testing. However, when thorough testing and beta releases bring confidence that production software is acceptably defect-free, redundant checks' value gradually decreases. With the value of redundant runtime checks diminishing, disabling them becomes more reasonable as doing so can often lead to measurable performance improvements. Although these assertions are disabled, they still carry valuable information which could assist the compiler's optimizer - namely, that for every defect-free program, the expression stated in the inactive assertion must hold. Most C and C++ compilers optimize code based on actively checked assertions; however, there is currently no standardized support for harnessing that very same information once redundant checks are disabled.

This talk explores the potential impact of the compiler assuming inactive C-style assertion predicates on runtime performance. We then share the result of our raw empirical research applied to real-world production software leveraging Bloomberg's BDE libraries, contrasting relevant metrics - such as compile times, run times, and binary sizes - across various categories of software libraries and applications. It will turn out that there are substantial opportunities to improve performance having relatively little impact on compile times. Moreover, if runtime performance is not improved, it is rarely, if ever, made measurably worse.

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Parsa Amini

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Videos Filmed & Edited by Bash Films: http://www.BashFilms.com

YouTube Channel Managed by Digital Medium Ltd https://events.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---
std::format is a very convenient and very fast text formatting interface added in C++20. This session looks at the internals of how std::format works, and why it works that way. We'll cover how and why argument types are erased (along with the basics of type erasure in general), how to customize format for your own types, precisely what happens when you do, and how format optimizes copying to its output without generating excessive amounts of code. No knowledge of std::format is required to understand this session.

While the primary goal of this session is to understand some std::format internals, many of the techniques described may help you make your own generic libraries smaller and faster.

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Charlie Barto

Charlie works on the Visual C++ Standard Library. He and open source contributors implemented ＜format＞ for msvc, based on {fmt}.

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Videos Filmed & Edited by Bash Films: http://www.BashFilms.com

YouTube Channel Managed by Digital Medium Ltd https://events.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---
The current design of C++ exceptions lead to many reasons and excuses to disable them. They require outstanding unwinding libraries, ABI specific support, slow failure paths, metadata that increases binary size, RTTI (run time type information), and many more. Putting costs and overhead aside, it is often impractical, or holds significant implementation barriers, to implement the necessary support for C++ exceptions in every environment - kernel, custom OS, hypervisors, embedded, or an arbitrary freestanding environment with limited or no C++ runtime libraries.

Writing code using exceptions is great though! The programmer gets to focus on the actual story of what the program is doing, and not worry too much about error propagation that happens automatically whenever an exception is thrown.

So how do we avoid the manual error propagation that is usually followed by turning off exceptions? We use Macros(!), of course, to propagate the errors via return value, such as CHECK_ERROR(expression), RIGHT? Well... Not in this talk.

In this session we are going to use the only tool I know of, that is both available in standard C++20, and gives us the ability to automatically propagate errors. If you read the title, you already know that this tool was not meant to be used for that purpose - that is C++20 Coroutines!

We are going to not only run without exceptions, we are turning off RTTI as well, as we get inspired by this alternative method of throwing exceptions, observe some cool optimizations such as memory allocation elisions, analyze the assembly code of coroutines, and more. We will even get the link to the open source library that I wrote for this talk, so that you could try it yourself!

This talk is for you if you want to get inspired on a unique usage of coroutines, not commonly seen before, or if you are working on kernel / freestanding code and like the use of exceptions. I hope that after this talk the audience plays with the thought that maybe in the future, exceptions could be implemented as a standard library feature, using a core language machinery such as coroutines, or some evolution or adaptation of it to this great use case.

How to prepare for the talk - please be familiar with C++20 coroutines, just the basic understanding is enough.

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Eyal Zedaka

Eyal Zedaka is a technical leader. He is a C++ knowledge center, lecturer in various C++ courses, and an author of C++ open source software in the areas of low level OS, and pure C++ frameworks. Eyal is now working at Magic Leap, an Augmented Reality (AR) device company, as manager of device security engineering, where he leads secure C++ development and vulnerability research throughout the platform. Eyal has served in designing a C++ freestanding framework for trusted execution environments, and providing consultation to embedded teams regarding C++ use in lower level areas. He had previously been a software security architect in charge of the Magic Leap platform security architecture, and a senior engineer in various low level and security C++ positions in the market for the last 9-10 years.

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Videos Filmed & Edited by Bash Films: http://www.BashFilms.com

YouTube Channel Managed by Digital Medium Ltd https://events.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
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Have you ever written code like this:
void f(bool b, long x, long& s) { if (b) s += x; }
Probably you have. Would you like me to tell you how much performance you left on the table? With a small change, that function could be made 2.5 times faster.

What about this code:
if (a[i] && b[i]) do_something(); else do_something_else();
Would you believe me if I told you that, under some not-so-exotic conditions, this line runs four times slower than it could be? It’s true, and I’m going to show you when and why.

This presentation will explain how modern CPUs handle computations to ensure that the hardware is used efficiently (which is how you get high performance from the processor). We will then learn how conditional code disrupts the ideal flow of computations and the countermeasures employed by the CPU designers to retain good performance in the presence of such code. Sometimes these measures are sufficient, often with the help of the compiler. But when they aren’t, it is up to the programmer to recover lost performance by coding with fewer branches.

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Fedor Pikus

Fedor G Pikus is a Chief Engineering Scientist in the Design to Silicon division of Mentor Graphics Corp (Siemens business). His earlier positions included a Senior Software Engineer at Google and a Chief Software Architect for Calibre PERC, LVS, DFM at Mentor Graphics. He joined Mentor Graphics in 1998 when he made a switch from academic research in computational physics to the software industry. Fedor is a recognized expert on high-performance computing and C++, he presented his works at CPPCon, SD West, DesignCon, in Software Development Journal, and is also an O’Reilly author. His responsibilities as a Chief Scientist include planning the long-term technical direction of Calibre products, directing and training the engineers who work on these products, design, and architecture of the software, and research in the new design and software technologies. Fedor has over 25 patents and over 100 papers and conference presentations on physics, EDA, software design, and C++ language.

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Videos Filmed & Edited by Bash Films: http://www.BashFilms.com

YouTube Channel Managed by Digital Medium Ltd https://events.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains: http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---
Consuming webservices is a routine work in today software development, however the solutions requires developers to repeat themselves very often : parsing and serializing payloads in JSON manually, hardcoding HTTP REST route calls in their applications themselves.

In principle OpenAPI comes to the rescue, but this implies generating code in a custom build process step, with terrible tooling leading to reduced code quality.

In this talk we present a clean and modern C++ solution to REST, JSON and OpenAPI with a bit of magic.

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Damien Buhl

Damien (aka daminetreg) co-founder and CEO tipi.build is an enthusiast C++ developer. Opensource entrepreneur, GameMaker.fr community founder, Qt for Android contributor, Boost.Fusion maintainer since 2014.

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Videos Streamed & Edited by Digital Medium: http://online.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---

This is the final part in a trilogy of talks covering the new Ranges functionality in C++20. Following the format of “C++20 Ranges in Practice” (CppCon 2020), in this installment we’ll look at three more everyday programming problems and discover how Ranges can be used to solve them cleanly, elegantly and concisely. In particular, in this talk we’ll focus on how we can implement our own custom range adaptors, often seen as the “final hurdle” on the road to conquering Ranges. Time permitting, we’ll also take a brief look at the new ranges additions currently in the planning stages for C++23.

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Tristan Brindle

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Videos Streamed & Edited by Digital Medium: http://online.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---
Imagine writing parallel code that can run on any platform - CPUs, GPUs, DPUs, specialized accelerators, etc. It's no longer just a dream - you can do it in Standard C++!

Parallelism is increasingly common in software, from supercomputer simulations to mobile applications. But writing parallel code is increasingly challenging, due to an explosion of diversity in hardware, a trend that's likely to continue into the future. To meet this challenge, the Standard C++ Committee has developed a roadmap for C++ Standard Parallelism, a parallel programming model that will be portable to all platforms while delivering reasonable performance and efficiency for most use cases.

Our vision of C++ Standard Parallelism consists of three key components:

* Common parallel algorithms that dispatch to vendor-optimized parallel libraries
* Tools to write your own parallel algorithms that run anywhere.
* Mechanisms for composing parallel invocations of algorithms into task graphs.

In this talk, we'll dive into this roadmap - we'll discuss what we already have that you can use today, what's coming down the line, and where the future may lead us.

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Bryce Lelbach

Bryce Adelstein Lelbach has spent over a decade developing software libraries and programming languages. He is the HPC Programming Models Architect at NVIDIA, where he leads programming language standardization efforts and drives the technical roadmap for NVIDIA's HPC compilers and libraries. Bryce is passionate about C++ and is one of the leaders of the C++ community. He is the
chair of INCITS/PL22, the US standards committee for programming languages and the Standard C++ Library Evolution group. Bryce is the program chair for the C++Now and CppCon conferences, and the chief organizer of the Bay Area C++ User Group. On the C++ Committee, he has personally worked on the C++17 parallel algorithms, executors, futures, senders/receivers, multidimensional arrays, and modules. He is one of the initial developers of the HPX parallel runtime system. He also helped start the LLVMLinux initiative and has occasionally contributed to the Boost C++ libraries.

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Videos Streamed & Edited by Digital Medium: http://online.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---

Most C and C++ programmers know the conventions for distributing declarations and definitions among headers and source files. However, there are exceptions to these conventions that we often chalk up to “linker magic”. If the linker can’t deal with multiply-defined symbols, how does it handle inline and constexpr functions? Why do explicit template specializations go into source files when most template code goes into headers? And what can embedded developers do to tell the linker to map certain code and data into specific memory regions?

This session answers these questions by taking a detailed look at how the traditional C/C++ build model works with headers and source files. It describes what happens during each stage of the build process: preprocessing, compiling, instantiation, and linking. It explains what information the compiler records from declarations and definitions – including exceptional cases like inline and templates – and how the linker uses that information to generate an executable. It also shows how you can use explicit instantiation to control memory layout and reduce build times. Finally, this session walks an example program through the entire build process to demonstrate how everything fits together.

This is **not** a session on C++20 Modules. However, it explains terms such as “translation unit” and “linkage” that are also part of the Modules framework, providing a solid foundation for understanding Modules.

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Ben Saks

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Videos Streamed & Edited by Digital Medium: http://online.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/

https://cppcon.org/
https://github.com/CppCon/CppCon2020
---

Embedded software typically uses memory-mapped registers to communicate with hardware. These registers are often finicky and demanding. Software that accesses a hardware register in the wrong way often produces bugs that are hard to diagnose and fix. In this session, we’ll look at ways to use operator overloading, enumeration types, and other C++ features to craft interfaces that protect against such misuses. We’ll then look at techniques for generalizing that code so that one implementation works for many variations of the hardware.

Using real-world examples of 8-bit and 16-bit hardware timers, we’ll begin by constructing a safe interface for a specific hardware timer. From there, we’ll use templates to generalize the implementation to cover more timer variations. By isolating and extracting the differences between the timers, we’ll minimize the need for code duplication. We’ll also be able to write application code that works equally well with any of the timers. Along the way, we’ll deal with smaller problems, such as dealing with non-contiguous register layouts and guaranteeing that large values are locked during accesses.

This session uses concrete examples of timers in the ARM7 and Arduino MEGA 2560 architectures. However, the techniques from this session apply to a wide variety of platforms and hardware devices such as serial ports or I/O pins.

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Ben Saks
Chief Engineer, Saks & Associates

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Videos Streamed & Edited by Digital Medium: http://online.digital-medium.co.uk

The CppCon YouTube Channel Is Sponsored By:
JetBrains : http://jb.gg/cpptools
SonarSource: https://www.sonarsource.com/