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Parallelism Safety-Critical Guidelines for C++

13:30 - 14:30 Friday 16th September 2022 MDT Summit 2 & 3 / Online D
Intermediate
Embedded

There are many C++ safety guidelines, including the C++ Core Guidelines, MISRA, AUTOSAR, JSF, CERT, High Integrity C++. But most of these either have no coverage of parallelism and concurrency safety or very little.

Part of this is due to the lack of experts that cover both the parallelism and concurrency domain, where high performance is the key focus, as well as the safety domain, which often can be counter to performance.

The next revision of MISRA C++ is heavily anticipated, with the first batch of rules being moved into public review in 2022. What you may not know is that there is also a group working on C++ parallel concurrency safety rules to be issued alongside the next MISRA C++.

C++ Core Guidelines also has a small section on parallelism and concurrency but it is small compared to the guidelines on sequential execution. Last year, we announced our intention to divide some of the rules found in this Misra parallel C++ safety group into both C++ CG and MISRA.

As many in the industry head towards multicore, manycore, and heterogeneous architectures, especially the case in the automotive, medical, and engineering industries, there has been increasing demands for these kinds of guidelines. However, most safety rules tend to focus only on sequential code. This WG within MISRA C++ in cooperation with C++ Core Guidelines is attended by safety experts with a parallelism background attempting to unify these guidelines.

This talk will take a look into the future and speak of some of the challenges we see with newer parallelism features from C++20 and beyond, analyzing potential issues in the context of safety-critical software and how they could be addressed by future rules. We will also summarize the latest progress of the group, reviewing the rules that have the potential of entering MISRA NEXT, or C++ CG covering parallelism features up to and including C++17.

Michael Wong

Distinguished Engineer, VPCodeplay

Michael Wong is a Distinguished Engineer at Codeplay Software, a Scottish company that produces compilers, debuggers, runtimes, testing systems, and other specialized tools to aid software development for heterogeneous systems, accelerators, and special purpose processor architectures, including GPUs and DSPs. For twenty years, he was the Senior Technical Strategy Architect for IBM compilers. Michael is also Chair of the Khronos C++ Heterogeneous Programming language SYCL, Editor for the Concurrency TS and the Transactional Memory TS, Canadian Head of Delegation to the ISO C++ Standard, Founding member of the ISO C++ Directions group, Director and VP of ISOCPP.org and Chair of al Programming Languages for Canada’s Standard Councils.

Andreas Weis

Woven Planet

Andreas Weis has been writing C++ code in many different domains, from real-time graphics, to distributed applications, to embedded systems. As a library writer by nature, he enjoys writing portable code and exposing complex functionalities through simple, richly-typed interfaces. Both of which C++ allows him to do extensively. Andreas is also one of the co-organizers of the Munich C++ User Group, which allows him to share this passion with others on a regular basis.

He currently works for Woven Planet, where he focuses on building modern software for use in safety critical systems.

Ilya Burylov

Intel

Ilya is an architect of C++ software solutions for autonomous driving market. He is working on contribution into functional safety standard MISRA and C++ standard bodies in threading and vectorization.
Ilya has contributed into various Intel software products such as Intel DAAL and Intel MKL.