Smarter Atomic Smart Pointers
Efficient Concurrent Memory Management for Everybody
Memory management is hard, especially for concurrent code, even for concurrency experts. To make it more manageable, C++ programmers almost always rely on high-level
abstractions such as smart pointers and deferred reclamation techniques such as hazard-pointers and RCU that offer to reduce the burden. These abstractions, however, come with many tradeoffs. In this talk, we will discuss recent library solutions that aim to combine the advantages of these techniques to produce a solution that is as easy to use as smart pointers but as fast and scalable as deferred reclamation techniques. We aim to convince the audience that scalable concurrent code with the performance of expert-written code can be written using abstractions as simple as smart pointers.
As a starting point, we will discuss existing techniques and their tradeoffs. Smart pointers, such as the recently standardized atomic shared pointer, drastically reduce programmer effort, but existing implementations do not scale and result in low-performance code. Advanced deferred reclamation techniques such as hazard-pointers and RCU, as included in the latest concurrency TS, are highly scalable but very subtle and difficult to use correctly. We will show that they are a common source of memory bugs even when used by concurrency experts.
The main part of the talk will then focus on several recent library interfaces that aim to combine the best of both worlds from atomic smart pointers and deferred reclamation techniques. We will also discuss some techniques that can be used to efficiently implement these interfaces and explore their performance.
Daniel Anderson
Daniel is a fifth-year PhD candidate in the Computer Science Department at Carnegie Mellon University. He is interested in the design of fast parallel algorithms and likes to write C++ libraries that make parallel computing easier and more accessible. He is a recipient of a best paper award from the ACM Symposium on Parallelism in Algorithms and Architectures conference.