Take Advantage of All the MIPS
SYCL and C++
Have you ever wanted to take advantage of all the MIPS in your machine with one programming language?
Have you ever wanted to support any kind of offload devices in C++, be they FPGA, GPUs, matrix/tensors, or DSPs? Many people have by augmenting a SYCL compiler.
Have you wondered why US National Labs are choosing SYCL as a standard programming model for exascale computing? This is because they know maximum performance can be achieved with a combination of host and accelerator devices in any vendor combination, so they choose SYCL.
Khronos SYCL is a framework language built on top of Modern C++. It is backed by an open standard in Khronos and enables ML frameworks and Standard C++ code on top of template libraries with lambda functions that have host and accelerate device code in a single source, but still enable separate compilation of host and device code. The device SYCL compiler may employ kernel fusion for better performance and the host CPU compiler can be any C++ compiler, from clang, GCC, VS C++, or IBM XL compiler. Many people have built SYCL compiler additions to dispatch to any variety of devices very quickly, from students to academia, to industry. There are already a number of backends including CUDA, PTX, OpenMP, AMD, NEC, Huawei, Kokkos, Raja, and TBB in addition to OpenCL.
There are also many interesting use cases with complex modern C++. PyTorch, Blender, ray-tracing, Flashlight ML, Eigen and Tensorflow, Gromacs, and CERN’s ATLAS experiment for high energy physics.
This talk from members of the SYCL and C++ community will talk about highlighted features from the latest SYCL 2020 as related to ISO C++. SYCL can serve even more Extreme Heterogeneity where Data Movement is still King. We also are entering the era of software and hardware Codesign with extreme Heterogeneity and SYCL can be a part of a standard programming model for all HPC, Embedded AI/ML, and Automotive
This talk will showcase these features and show how SYCL 2020 has increased expressiveness and simplicity for modern C++ heterogeneous programming.
There will also be a 3-day tutorial for those interested in learning how to use SYCL on various architectures, led by the experts from each company in a hands-on tutorial.
Gordon Brown
Gordon Brown is a principal software engineer at Codeplay Software specializing in heterogeneous programming models for C++. He has been involved in the standardization of the Khronos standard SYCL and the development of Codeplay’s implementation of the standard; ComputeCpp, from its inception. More recently he has been involved in the efforts within SG1/SG14 to standardize execution and to bring heterogeneous computing to C++, including executors, topology discovery and affinity. Gordon is also a regular speaker at CppCon and teaches the CppCon class on parallelism and GPU programming in C++.
Michael Wong
Michael Wong is a Distinguished Engineer at Codeplay Software, a Scottish company that produces compilers, debuggers, runtimes, testing systems, and other specialized tools to aid software development for heterogeneous systems, accelerators, and special purpose processor architectures, including GPUs and DSPs. For twenty years, he was the Senior Technical Strategy Architect for IBM compilers. Michael is also Chair of the Khronos C++ Heterogeneous Programming language SYCL, Editor for the Concurrency TS and the Transactional Memory TS, Canadian Head of Delegation to the ISO C++ Standard, Founding member of the ISO C++ Directions group, Director and VP of ISOCPP.org and Chair of al Programming Languages for Canada’s Standard Councils.
Ronan Keryell
Ronan Keryell is principal software engineer at AMD working on high-level programming models for FPGA and is member of the Khronos OpenCL & SYCL C++ committee. Ronan Keryell received his MSc in Electrical Engineering and PhD in Computer Science from
École Normale Supérieure of Paris (France), on the design of a massively parallel RISC-based VLIW-SIMD graphics computer and its programming environment. Ronan was assistant professor in the Computer Science department at MINES Paris Tech and later at Télécom Bretagne (France), working on automatic parallelization, compilation of PGAS languages (High-Performance Fortran), high-level synthesis and co-design, networking, and secure computing. He was co-founder of 3 start-ups, mainly in the area of High Performance Computing, and was the technical lead of the Par4All automatic parallelizer at SILKAN, targeting OpenMP, CUDA & OpenCL from sequential C & Fortran.
Nevin Liber
Nevin “:-)” Liber is a Computer Scientist in the ALCF (Argonne Leadership Computing Facility) division of Argonne National Laboratory, where he works on the oneAPI/DPC++/SYCL backend for Kokkos for Aurora. He also represents Argonne on the SYCL and C++ Committees, the latter as Vice Chair of LEWGI/SG18. Back when he started out working at Bell Labs over three decades ago, a friend of his called and asked “What do you know about C++? You folks invented it!” That was enough to get a relatively shy junior engineer to go find the local expert so he could go play with it, and the rest is history! He has worked in C++ across various industries and platforms (big data, low-latency, operating systems, embedded, telephony and now exascale computing, just to name a few). He has also been a C++ Committee member since 2010 and hosted both the C++ and C standards meetings in Chicago.